NORTH CAROLINA STATE UNIVERSITY
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING

ECE 212 and ECE 212S
FUNDAMENTALS OF LOGIC DESIGN

Homework Assignment 6 - Solutions

1. (Flip-Flops) The basic functionality of a T flip-flop can be implemented by using a JK flip-flop and connecting the two inputs J and K together to form the new T input. Show that this is true by using the characteristic tables for a T flip-flop and a JK flip-flop.

   Solution: The characteristic equation for the flip-flop is given by

   If we replace by (which is equivalent to replacing K by T) and replace J by T, we obtain

   Since the characteristic equation for the T flip-flop is given by

   we find that the basic functionality of the T flip-flop can be implemented by connecting the flip-flop as stated.

2. (Flip-Flops) Any flip-flop type can be implemented from another type with suitable logic applied to the latter's inputs. Show how to implement an RS flip-flop starting with a T flip-flop.

   Solution: We can solve this problem by designing a circuit with inputs R, S, and Q (the previous state) and output T which is the actual input to the T flip flop. The required truth table for this circuit is shown below. The next state in this table has been determined by the inputs R, and S. Once we know , the required values for T are the same as the values of based upon the excitation table for the T flip-flop.

    
   Table 1: Truth table for Problem 2.
   

   From the table, we find that

   Figure 1 gives the Karnaugh map for T.

     
   Figure 1: Karnaugh for Problem 2.
   

   Using the karnaugh map for simplification, we find that

   The circuit implementation for this problem is given in Figure 2.

     
   Figure 2: Schematic diagram for Problem 2.
   

3. (Flip-Flops) The characteristic equations for a D flip-flop determine that the output Q is updated to either 0 or 1 after each clock cycle. A loadable D flip-flop has one additional input Load that allows data to be stored in the flip-flop for more than a single clock cycle. Design a loadable D flip-flop using a normal D flip-flop and some combinational logic. Use the charateristic equations for a D flop-flop as a starting point. When the input signal Load=1, the flip-flop functions as a normal D flip-flop. When the input signal Load=0, the output Q stays at it's previous value.

   Solution: We can solve this problem by designing a circuit with inputs Load, D, and Q (the previous state) and output D' which is the actual input to the D flip flop. The required truth table for this circuit is shown below. The next state in this table has been determined by the inputs Load, D, and Q. Once we know , the required values for D' are based upon the excitation table for the D flip-flop. They are the required values for D' given the current values of Q and .

    
   Table 2: Truth table for Problem 3.
   

   From the table, we find that

   Using a karnaugh map for simplification, we find that

   The circuit implementation for this problem is shown in Figure 3.

     
   Figure 3: Schematic diagram for Problem 3.
   

4. (Flip-Flops) Any flip-flop type can be implemented from another type with suitable logic applied to the latter's inputs. Show how to implement a loadable D flip-flop starting with a T flip-flop.

   Solution: We can solve this problem by designing a circuit with inputs Load, D, and Q (the previous state) and output T which is the actual input to the T flip flop. The required truth table for this circuit is shown below. The next state in this table has been determined by the inputs Load, D, and Q. Once we know , the required values for T are based upon the excitation table for the T flip-flop. They are the required values for T given the current values of Q and .

    
   Table 3: Truth table for Problem 4.
   

   From the table, we find that

   Using a karnaugh map for simplification, we find that

   The circuit implementation for this problem is shown in Figure 4.

     
   Figure 4: Schematic diagram for Problem 4.
   

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