Howard University
Department of Electrical & Computer Engineering
Homework 6
Complete the following problems found in the second edition of the textbook:
4.11) State the phases of the instructions cycle and briefly describe what operations occur in the phase.
4.13) Say it takes 100 cycles to read from or write to memory and only one cycle to read from or write to a register. Calculate the number of cycles it takes for each phase of the instruction cycle for both the IA-32 instruction “ADD [eax],edx” (refer to example 4.3) and the LC-3 instruction “ADD R6,R2,R6”. Assume each phase (if required) takes one cycle, unless a memory accesses is required.
4.14) Describe the execution of the JMP instruction if R3 contains x369C (refer to example 4.5).
4.16) a. If a machine cycle is 2 ns, how many cycles occur each second?
b. If the computer requires on the average eight cycles to process each instruction, and the computer processes instructions one at a time from beginning to end, how many instructions can the computer process in one second?
c. Preview of future courses: In today’s microprocessors, many features are added to increase the number of instructions processed each second. One such featured is the computer’s equivalent of an assembly line. Each phase of the instruction cycle is implemented as one or more separate pieces of logic. Each step in the processing of an instruction picks up where the previous instruction left off in the previous machine cycle.
Using this feature, an instruction can be fetched from memory every machine cycle and handed off at the end of the machine cycle to the decoder, which performs the decoding function during the next machine cycle while the next instruction is being fetched. Ergo, the assembly line. Assuming instructions are located at sequential addresses in memory, and nothing breaks the sequential flow, how many instructions can the microprocessor execute each second if the assembly line is present? (The assembly line is called a pipeline, which you will encounter in your advanced courses. There are many reasons why the assembly line cannot operate at its maximum rate, a topic you will consider at length in some of these courses.)
5.1) Given instructions, ADD, JMP, LEA, and NOT, identify whether the instructions are operate instructions, data movement instructions, or control instructions. For each instruction, list the addressing modes that can be used with the instruction.
5.2) The memory’s addressability is 64 bits. What does that tell you about the size of the MAR and MDR ?
5.4) Say we have a memory consisting of 256 locations, and each location contains sixteen bits.
5.5)
a. What is an addressing mode?
b. Name three places an instruction’s operands might be located.
c. List the five addressing modes of the LC-3, and for each one state where the operand is located (from part b).
d. What addressing mode is used by the ADD instruction shown in Section 5.1.2?
5.6) Recall the machine busy example from section 2.7.1? Assuming the BUSYNESS vector is stored in R2, we can use the LC-3 instruction 0101 011 010 1 00001 (AND R3,R2,#1) to determine whether machine 0 is busy or not. If the result of this instruction is zero then machine 0 is busy.
a. Write an LC-3 instruction that determines whether machine 2 is busy.
b. Write an LC-3 instruction that determines whether both machines two and three are busy.
c. Write an LC-3 instruction that indicates none of the machines are busy.
d. Can you write an LC-3 instruction that determines whether machine 6 is busy? Is there a problem here?
5.7) What is the largest positive number we can represent literally (i.e. as an immediate value) within an LC-3 ADD instruction?