Howard University

Department of Electrical & Computer Engineering

 

EECE 200 – Introduction to Computer Engineering

                                                           

Homework 5

 

 

3.24)  a.  Figure 3.39 on page 89 in the textbook shows a logic circuit that appears in many of today’s processors.  Each of the boxes is a full adder circuit.  What does the value on wire X do? That is, what is the difference in the output of this circuit if X=0 versus if X=1?

 

b.  Construct a logic diagram that implements an adder/subtractor. That is the logic circuit will compute A+B or A-B depending on the value of X. Hint: Use the logic diagram of Figure 3.39 as a building block.

 

 

3.29) A sixteen bit register contains a value. Te value x75A2 is written into it. Can the original value be recovered?

 

3.32) Distinguish between a memory address and the memory’s addressability.

 

 

3.35) Given a memory that is addressed by 22 bits and is 3-bit addressable, how many bits of storage does the memory contain?

 

4.1)  Name the five components of the Von Neuman model.  For each component, state it’s purpose.

 

4.4)  What is the word length of a computer?  How does the word length of a computer affect what the computer is able to compute?  That is, is it a valid argument, in light of what you learned in Chapter 1, to say that a computer with a larger word size can process more information and therefore is capable of computing mor than a computer with a smaller word size?

 

 

 

 

 

 

 

 

 

 

 

4.5) The following table represents a small memory.  Refer to this table for the following question.

 

Address

Data

0000

0001 1110 0100 0011

0001

1111 0000 0010 0101

0010

0110 1111 0000 0001

0011

0000 0000 0000 0000

0100

0000 0000 0110 0101

0101

0000 0000 0000 0110

0110

1111 1110 1101 0011

0111

0000 0110 1101 1001

 

 

4.6) What are the two components of an instruction? What information do these two components contain?

 

4.7) Suppose a 32-bit instruction takes the format as shown in the textbook on page 112.

 

OPCODE  |    SR  | DR | IMMM

 

If there are 60 opcodes and 32 registers, what is the range of values that can be represented by the immediate (IMM) ? Assume IMM is a 2’s complement value.

 

4.9)  The FETCH phase of the instruction cycle does two important things.  One is that it loads the instruction to be processed next to the IR.  What is the other important thing?