(RARE) Presentations and Publications

Presentations


I. Sahin, C. Gloster, and C. Doss, "The Rare Project", University Booth at 37th Design Automation Conference, Los Angeles, CA., June, 2001. [ppt] [pdf]

I. Sahin, C. Gloster, and C. Doss, "Feasibility of Floating-Point Arithmetic in Reconfigurable Computing Systems", Military and Aerospace Applications of Programmable Devices and Technology Conference, DC., September 2000. [ppt] [pdf]

I.Sahin, "A Compilation Tool for Automated Mapping of Algorithms Onto FPGA-Based Custom Computing Machines", HiPer DSP Group, Raleigh, NC., Spring 2000. [ppt] [pdf]

S. Subramanian, "High Performance Computing on the Internet", HiPer DSP Group, Raleigh, NC., Spring 2000. [ppt] [pdf]

R. J. Rouse "A Floating Point Divider for RC System", HiPer DSP Group, Raleigh, NC., Spring 2000. [ppt] [pdf]
C. Gloster "Hierarchical Algorithms and Their Embedded Computational Realization in Reconfigurable Hardware", NASA GSFC, Greenbelt, MD., September 2001. [htm]


Conference papers

I. Sahin, C. Gloster, and C. Doss, "Feasibility of Floating-Point Arithmetic in Reconfigurable Computing Systems", Military and Aerospace Applications of Programmable Devices and Technology Conference, DC., September 2000. [doc] [pdf]

D. Eatmon, and C. Gloster, "Evaluating Placement Algorithms for Run-Time Reconfigurable Systems", Proceedings of the Military and Aerospace Programmable Logic Devices Conference, Greenbelt, Maryland, Sep. 1999 [doc] [pdf]

C. Doss, and C. Gloster, "Automated Interface Generation for Remote Access to Adaptive Computing Resources", Proceedings of the Military and Aerospace Programmable Logic Devices Conference, Greenbelt, Maryland,Sep. 1999 [doc] [pdf]

C. Graves, C. Gloster, "Advanced Adaptive Wavelet Packet techniques for Image Compressioin", Accepted for publication in the Proceedings of the International Conference on Signal Processing Applications and Techniques, Dallas, Texas, October 16-19, 2000.

Wensheng Huang, Winser Alexander, Clay Gloster, "Block Wavelet Transform Adaptive Filtering", Proceedings of the First IEEE E/IT Conference, Paper No. EIT 539 Chicago, Illinois, June 8-11, 2000.

M. Figueiredo, C. Gloster, "Implementation of a Probabilistic Neural Network for Multispectral Image Classification on an FPGA Based Custom Computing Machine", 5th Symposium on Neural Networks, Belo Horizonte, Brazil, December 9-11, 1998.

C. Doss, C. Gloster, "A Distance Education Course in Computer Engineering at NC State University", Proceedings of the ASEE Conference, Charlotte, NC, June 1999.

Thomas K. Miller, Gary Mirka, Clay Gloster, Cheryl Alderman, Troy Holder, Toby Crawley, Kathy L. Hewitt, Leigh Anne Rettinger, and Catherine E. Brawner. "MBone Virtual Classroom for Engineering Distance Education". 1998 International Conference on Engineering Education, Rio de Janeiro, Brazil, August, 1998.

C. Gloster,"Lessons Learned from a Distance Education Experiment at NC State University", Accepted for publication in Proceedings of the Ghana Conference on Computer Literacy and Distance Education, Ghana, West Africa, May 1998.

C. Graves and C. Gloster, "Use of Dynamically Reconfigurable Logic in Adaptive Wavelet Packets", Proceedings of the Canadian Workshop on Programmable Devices, June 1998.

C. Gloster, P. Meyer, and W. Alexander, "Implementing the 2-D Discrete Cosine Transform Using Commercial Quad-Processor DSP Boards", Proceedings of the International Conference on Signal Processing: Applications and Technology, Boston, Massachusetts, October 1996.

C. Graves, C. Gloster and C. Doss, "VHDL Modeling of a Parallel Architecture for Computing the Discrete Cosine Transform and it's Inverse", Proceedings of the VHDL International Users Forum, Durham, North Carolina, pp. 63 - 72, October 1996.

W. Alexander, D. Reeves, and C. Gloster, "Parallel Image Processing with the Block Data Parallel Architecture", Proceedings of the IEEE, Volume 84, No. 7, pp. 947-968, July 1996.

C. Gloster and F. Brglez, "Partial Scan Chain Selection for User-Specified Fault Coverage", Proceedings of the EURO-DAC Conference, Brighton, United Kingdom, pp. 111 - 116, September 1995.

C. Gloster and M. Vilas, "Automatic Built-In Self-Test Insertion for High Level Circuit Descriptions", Proceedings of the IEEE ASICs Conference, Austin, Texas, pp. 222-226, September 1995.

C. Gloster and S. Subramanian, "A Fault Coverage-Driven Partial Scan Chain Selection Technique", Proceedings of the IEEE ASICs Conference, Rochester, N.Y., pp. 366-369 September 1994.

C. Gloster, F. Brglez, "Synthesis of Weighted Random Sequences with Application to Testing of Sequential Circuits", Proc. of the EDAC-EUROASIC-1993, Paris, France, pp. 231-237, February 1993.

C. Gloster, F. Brglez, "Cellular Scan Test Generation for Sequential Circuits", Proc. of the European Design Automation Conference, Hamburg, Germany, pp. 530- 536, September 1992.

C. Gloster, F. Brglez, "Cellular Scan Revisited", Proc. of the Third Annual Symposium on CSA and the Twenty-Fourth Southeastern Symposium on System Theory, pp. 246-250, March 1992.

C. Gloster, F. Brglez, "Synthesis for BIST of Finite State Machines", Proc. of the Second Annual Symposium on CSA, pp. 155-160, March 1991.

C. Gloster, F. Brglez, "Boundary Scan with Built-In Self-Test", Reprinted In Book: C. Maunder and R. Tulloss, The Test Access Port and Boundary Scan Architecture, pp. 266 - 274, September 1990.

F. Brglez, C. Gloster, G. Kedem, "Built-In Self-Test with Weighted Random Pattern Hardware", Proc. of the International Conference on Computer Design, pp. 161-166, September 1990.

F. Brglez, C. Gloster, G. Kedem, "Hardware Based Weighted Random Pattern Generation for Boundary Scan", Proc. of the IEEE International Test Conference, August 1989.

F. Brglez, D. Bryan, C. Gloster, G. Kedem, K. Kozminski, R. Lisanke, M. Schulz, "Synergy of Synthesis and Test", Proc. of the Univ./Govt./Industry Microelectronics Symposium, June 1989.

C. Gloster, F. Brglez, "Boundary Scan with Built-In Self-Test", IEEE Design and Test of Computers, Volume 6, Number 1, pp. 36-44, February 1989.

C. Gloster, F. Brglez, "Boundary Scan with Cellular-Based Built-In Self-Test", Revised and Reprinted In: S. Scheiber, "Building Circuits that Test Themselves", Test and Measurement World, Volume 8, Number 11, pp. 60-68, November 1988.

C. Gloster, F. Brglez, "Boundary Scan with Cellular-Based Built-In Self-Test", Proc. of the IEEE International Test Conference, September 1988.



Journal papers

C Doss, C. Gloster, I. Sahin, and M. A. Figueiredo, "Comparing PNN Implementations on Reconfigurable Systems", To appear in IEEE TRANSACTIONS ON VLSI SYSTEMS, [pdf]

W. Alexander, D. Reeves, and C. Gloster, "Parallel Image Processing with the Block Data Parallel Architecture'', (Reprinted from Proceedings of the IEEE, vol. 84, pg 947-968, 1996) IBM Journal of Research and Development , Sept. 2000, vol. 44 no. 5, pp 681-702. [pdf]

M. Figueiredo, C. Gloster, Mark Stephens, Corey Graves, Mouna Nakkar, "Implementation of Multi-spectral Image Classification on a Remote Adaptive Computer", Journal of VLSI Design Special Issue on Reconfigurable Computing, Volume 10, Number 3, pages 307-319, 2000. [pdf]

C. Doss, C. Gloster, "A Distance Education Course in Computer Engineering at NC State University", Accepted for publication in the Computer in Education Journal, Number 3, July 2000.