Howard University

Department of Electrical & Computer Engineering

EECE 211

Digital Systems Design

Instructor ������ Clay Gloster, Jr., Ph.D., P.E.,

email: [email protected]

telephone: 202-806-6628

Office Hours ���� 3014 L.K. Downing Hall,

M 11:00 a.m. - 12:00 p.m.

T 11:00 a.m. - 12:00 p.m., Others by appointment

(Please send email to make an appointment!!)

Prerequisite����� EECE -200(CPE Majors) Sophomore Standing(Others)

Text������������� Contemporary Logic Design, By Randy Katz

Publishers: Benjamin/Cummings Publishing Company and/or Prentice Hall, ISBN: 0-8053-2703-7

Additional Reading Digital Design, Third Edition, By John F. Wakerly, ISBN 0-13-769191-2,

Published by Prentice Hall, Copyright 2000.

Grading���������� 20% Two examinations (10% each)

����������������� �10% Group examination

����������������� �30% Final examination

����������������� �20% Project

����������������� �15% Homework

����������������� �5% Class participation

�����������������

Test Dates:

Exam #1: Thursday, February 10

Exam #2: Thursday, March 10

Exam #3: (Group grade)

Final examination date:

(TH 2:10 � 3:30) Wednesday May 11 12:00 � 2:00 PM.

Makeup Policy ��� There will be no makeup examinations given in this class. Students that have a valid excuse for missing an examination, i.e. hospitalization, may be allowed to count the next examination following the missed exam twice as heavily.

Late Assignments Assignments turned in after the due date will be accepted only until solutions are posted. Points will be deducted according to the following scale:�

1-day late - 10 points off, 2-days late - 20 points off

3-days late - 40 points off, 4-days late - 80 points off

(This policy does not include university holidays and weekends.)

Group_Examination ����� The group examination grade will be computed as follows. �Grades for all group members will be averaged for the 2 examinations that were actually taken.� All group members will receive this group examination grade as the score for Exam #3.

Instructional Objectives

This course covers the fundamentals of hardware design for digital systems.� The wide spread use of software tools to assist in the design of digital hardware and the emergence of rapid implementation technology has changed the way hardware design is actually practiced in industry.� In this course, the goal is to cover the fundamentals of logic design and introduce the student to typical software tools available for the computer hardware design process.

At the end of this course, students should be able to:

1) Design moderate to complex combinational circuits.

2) Design simple controllers and finite state machines.

3) Effectively use K-MAPs and Boolean algebra for logic minimization.

4) Design using a top-down methodology.

5) To complete an extensive design project in which software/hardware must be used to develop a working system.

Attendance� Attendance will be taken at the beginning of each class.� Students who do not respond to there name at this time will be marked absent from the class.� Excessive absences will reduce the class participation grade. So please get to class on time!! Also you will find that missing just one class will put you significantly behind in class, so please try to attend all classes.